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  specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general el ectronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. n2608 ms / 80107 ms pc b8-9208 no.a0907-1/6 LV8013T overview LV8013T is a 1ch forward/reverse motor driver ic using d-mos fet for output stage. as mos circuit is used, it supports the pwm input. its features are that the on resistance (0.3 ? typ) and current dissipation are low. it also provides protection functions such as heat protection circuit and reduced voltage detection and is optimal for the motors that need high-current. functions ? 1ch forward/reverse motor driver ? possible to respond to 3v control voltage and 6v motor voltage device ? low power consumption ? low-temperature resistance 0.5 ? ? built-in charge pump circuit ? built-in low voltage reset and thermal shutdown circuit ? four mode function forward/reverse, brake, stop. specifications maximum ratings at ta = 25 c, sgnd = pgnd = 0v parameter symbol conditions ratings unit supply voltage (for load) vm max -0.5 to 16 v supply voltage (for control) v cc max -0.5 to 6.0 v i o max dc 1.2 a i o peak1 t 100ms, f = 5hz 2.0 a output current i o peak2 t 10ms, f = 5hz 3.8 a input voltage v in max -0.5 to v cc +0.5 v allowable power dissipation pd max mounted on a specified board * 800 mw operating temperature topr -20 to +75 c storage temperature tstg -55 to +150 c *specified board : 30mm 50mm 1.6mm, glass epoxy board. bi-cmos ic forward/reverse motor driver orderin g numbe r : ena0907a
LV8013T no.a0907-2/6 allowable operating conditions at ta = 25 c, sgnd = pgnd = 0v parameter symbol conditions ratings unit supply voltage (for load) vm 2.0 to 15.0 v supply voltage (for control) v cc 2.7 to 5.5 v input signal voltage v in 0 to v cc v input signal frequency f max duty = 50% 200 khz capacitor for charge pump c1, c2, cvg1, cvg2 0.001 to 0.1 f electrical characteristics at ta = 25 c, v cc = 5.0v, vm = 12.0v, sgnd = pgnd = 0v, unless especially specified. ratings parameter symbol conditions re- marks min typ max unit supply current for load at standby 1 im1 en = 0v 1 1.0 a supply current for load at standby 2 im2 v cc = 0v, each input = 0v 1 1.0 a supply current for control at standby ico en = 0v, in1 = in2 = 0v 2 12.5 25 50 a current drain during operation 1 ic1 v cc = 3.3v, en = 3.3v, vg at no load 3 0.6 1.0 ma current drain during operation 2 ic2 v cc = 5.0v, en = 5v, vg at no load 3 0.7 1.2 ma h-level input voltage v ih 2.7v v cc 5.5v 0.6 v cc v cc v l-level input voltage v il 2.7v v cc 5.5v 0 0.2 v cc v h-level input current (in1, in2, tin) i ih v in = 5v 4 12.5 25 50 a l-level input current (in1, in2, tin) i il v in = 0v 4 -1.0 a pull-up resistance (en) rup 4 100 200 400 k ? pull-down resistance (en) rdn 4 100 200 400 k ? output on resistance ron sum of on resistances at top and bottom 5 0.3 0.5 ? charge pump voltage1 vg1 v cc 2 - 5.4v clamp circuit 6 5.15 5.4 5.65 v charge pump voltage2 vg2 vm + vg1 voltag e raising circuit 6 17.1 17.4 17.6 v low-voltage detection operation voltage vcs v cc voltage 7 2.1 2.25 2.4 v thermal shutdown operation temperature tth design guarantee 8 150 180 210 c charge pump capacity 1 vg1load ig1 = 500 a 9 5.0 5.3 v charge pump capacity 2 vg2load ig2 = 500 a 9 16.0 16.5 v ig current dissipation (fin = 20khz) ig 10 350 a charge pump start time tvg cvg = 0.1 f 11 1.0 ms turn on time tplh 12 0.5 1.0 s output block turn off time tphl 12 0.5 1.0 s turn on time ton c = 500pf 12 0.5 20 s tout turn off time toff c = 500pf 12 0.5 20 s tout output voltage h toh c = 500pf vg2-0.1 vg2 v tout output voltage l tol c = 500pf 0.05 0.1 v * design guarantee : this characteristics is not measured. refer to next page for remarks.
LV8013T no.a0907-3/6 remarks 1. it shows current dissipation of vm pin in output off state. 2. it shows current dissipation of v cc pin in stand-by state. (the standard current depends on en pin pull-down resistor.) 3. it shows current dissipation of v cc pin in state of en = 5v (stand-by), including current dissipation of vg pin. 4. in1, in2 and tin pin are built-in pull-down resistor, en pin is built-in pull-up resistor. 5. it shows sum of upper and lower saturation voltages of out pin. 6. it controls charge-pump oscillation and makes specified voltage. 7. when low voltage is detected, the lower output is turned off. 8. when thermal protection circuit is activated, the lower output is turned off. when the heat temperature is fa llen, it is turned on again. 9. ig (vg pin load current) = 500 a 10. it shows vg pin current dissipation in state of pwm input for in pin. 11. it specifies start-up time from 10 % to 90 % when vg is in non-load state (when setting the capacitor between vg and gnd to 0.1 f and v cc is 5v). 12. it specifies 10 % to 90 % for start-up and 90 % to 10 % for shut-down. package dimensions unit : mm (typ) 3260a pin assignment 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 sgnd c2h c2l vg1 c1h c1l v cc in1 in2 en tin tout vg2 vm out2 out2 nc pgnd pgnd nc nc out1 out1 vm LV8013T top view sanyo : tssop24(225mil) 6.4 0.5 4.4 (0.5) (1.0) 6.5 0.5 0.15 1 12 24 13 0.22 0.08 1.2max -20 0 20 40 60 75 80 100 0 1000 800 600 400 200 480 pd max -- ta ambient temperature, ta -- c allowable power dissipation, pd max -- mw specified board: 30 50 1.6mm 3 glass epoxy board.
LV8013T no.a0907-4/6 block diagram ch2 cl2 ch1 cl1 vm osc,charge_pump v cc in1 in2 en cmos logic level shifter vg1 vg2 tout out1 out2 pgnd tin sgnd low-voltage thermal protection deffused resistor truth table en in1 in2 tin out1 out2 tout charge pump mode h h - l l - brake h l - h l - forward l h - l h - reverse l l - z z - standby - - l - - l tr-off h - - h - - h on tr-on l - - - l l l off standby - : don?t care, z : high-impedance current drain becomes zero in the standby mode. (leak current from en pin is excluded) the output side becomes off, with motor drive stopped, during voltage reduction and thermal protection. also, the charge of vg2 is discharged with an internal circuit at decreasing voltage. pin function pin no. pin name function equivalent circuit 6 c1l voltage raising capacitor connection pin. v cc c1l 5 c1h voltage raising capacitor connection pin. vg1 c1h 8 9 11 in1 in2 tin driver output changeover. tout output control pin. (built-in pull-down resistor) v cc 200k ? continued on next page.
LV8013T no.a0907-5/6 continued from preceding page. pin no. pin name function equivalent circuit 10 en logic enable pin. (built-in pull-up resistor) v cc 200k ? 14 15 21 22 18 19 out1 out1 out2 out2 pgnd pgnd driver output pin. out1 out2 vm pgnd 12 tout voltage raising output pin. vg2 13 23 vm vm motor power supply. (both terminals to be connected) 7 v cc logic power supply. 4 vg1 voltage raising circuit 1. v cc 2 clamped to 5.4v vg1 c1h c1l 0.01 f 0.1 f 24 2 3 vg2 c2h c2l voltage raising circuit 2. vm + vg1 voltage raising capacitor connection pin. vg2 is discharged in abnormal. vg2 c2h c2l 0.01 f 0.1 f vm 1 sgnd logic gnd 18 19 pgnd pgnd driver gnd (both terminals to be connected)
LV8013T ps no.a0907-6/6 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. application circuit example c2h c2l vg1 c2h c2l v cc in1 in2 en tin sgnd vm out1 out1 pgnd pgnd out2 out2 vm tout vg2 c2=0.01 f c1=0.01 f cvg1=0.1 f cpu m *1 cvg2 =0.1 f 2.7v to 5.5v 2.7v to 5.5v *1 : connect a kickback absorption capacito r directly near ic. coil kick-back may cause rise of the voltage of vm line, and the voltage exceeding the maximum rating may be applied momentarily, resulting in deterioration or damage of ic. this catalog provides information as of november, 2008. specifications and inform ation herein are subject to change without notice.


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